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COM Express Interfaces
2.9. USB 3.0
USB 3.0 is the third major revision of the Universal Serial Bus (USB) standard for computer
connectivity. It adds a new transfer speed called SuperSpeed (SS) to the already existing
LowSpeed (LS), FullSpeed (FS) and HighSpeed (HS).
USB 3.0 leverages the existing USB 2.0 infrastructure by adding two additional data pair lines to
allow a transmission speed up to 5 Gbit/s, which is 10 times faster than USB 2.0 with 480 Mbit/s.
The additional data lines are unidirectional instead of the bidirectional USB 2.0 data lines.
USB 3.0 is fully backward compatible to USB 2.0. USB 3.0 connectors are different from USB
2.0 connectors. The USB 3.0 connector is a super set of a USB 2.0 connector, with 4 additional
pins that are invisible to USB 2.0 connectors. A USB 2.0 Type A plug may be used in a USB 3.0
Type A receptacle, but the USB 3.0 SuperSpeed functions will not be available.
2.9.1. Signal Definitions
Type 10 offers up to 2 USB 3.0 ports and Type 6 up to 4.
Table 20: USB 2.0 Differential Lines
Signal Pins T6 Pins T10 Description I/O
USB0+ A46 A46 USB Port 0, data + or D+ I/O USB
USB0- A45 A45 USB Port 0, data - or D- I/O USB
USB1+ B46 B46 USB Port 1, data + or D+ I/O USB
USB1- B45 B45 USB Port 1, data - or D- I/O USB
USB2+ A43 USB Port 2, data + or D+ I/O USB
USB2- A42 USB Port 2, data - or D- I/O USB
USB3+ B43 USB Port 3, data + or D+ I/O USB
USB3- B42 USB Port 3, data - or D- I/O USB
Table 21: USB Overcurrent Protection lines
Signal Pins T6 Pins T10 Description I/O
USB_0_1_OC# B44 B44 USB over-current sense, USB channels 0 and 1. I CMOS
USB_2-3_OC# A44 USB over-current sense, USB channels 2 and 3. I CMOS
Table 22: USB 3.0 Differential Lines
Signal Pins T6 Pins T10 Description I/O
USB_SSTX0+ D4 B23 USB Port 0, SuperSpeed TX + O PCIE
USB_SSTX0- D3 B22 USB Port 0, SuperSpeed TX - O PCIE
USB_SSTX1+ D7 B26 USB Port 1, SuperSpeed TX + O PCIE
USB_SSTX1- D6 B25 USB Port 1, SuperSpeed TX - O PCIE
USB_SSTX2+ D10 USB Port 2, SuperSpeed TX + O PCIE
USB_SSTX2- D9 USB Port 2, SuperSpeed TX - O PCIE
USB_SSTX3+ D13 USB Port 3, SuperSpeed TX + O PCIE
USB_SSTX3- D12 USB Port 3, SuperSpeed TX - O PCIE
USB_SSRX0+ C4 A23 USB Port 0, SuperSpeed RX + I PCIE
USB_SSRX0- C3 A22 USB Port 0, SuperSpeed RX - I PCIE
USB_SSRX1+ C7 A26 USB Port 1, SuperSpeed RX + I PCIE
USB_SSRX1- C6 A25 USB Port 1, SuperSpeed RX - I PCIE
USB_SSRX2+ C10 USB Port 2, SuperSpeed RX + I PCIE
USB_SSRX2- C9 USB Port 2, SuperSpeed RX - I PCIE
PICMG
®
COM Express
®
Carrier Board Design Guide Rev. 2.0 / December 6, 2013
81/218
- COM Express® 1
- Carrier Design Guide 1
- Contents 3
- 1. Preface 8
- 1.6. Name and logo usage 9
- 1.7. Intellectual property 10
- Term Description 11
- 1.10. Schematic Conventions 15
- 2. COM Express Interfaces 16
- COM Expre ss Module 17
- Type 10 17
- Table 4: Pin-out Comparison 20
- , the PCI 30
- 2.3.5. Schematic Examples 34
- Signal Pin Description I/O 45
- Figure 15: ExpressCard Size 45
- 2.4.1. Signal Definitions 48
- 2.4.2. PEG Configuration 49
- 2.4.3. Reference Schematics 52
- DisplayPort is supported 55
- DisplayPort Example 56
- Figure 21: HDMI Example 57
- Figure 22: DVI Example 59
- SDVO Port Configuration 61
- Supported SDVO Devices 62
- DVI_SDAROM 63
- DVI_SCLROM 63
- SDVO I2C Bus Address 63
- Write = 0111 0000 (70h) 63
- Read = 0111 0001 (71h) 63
- 2.6.1. Signal Definitions 66
- Earliest asserted 1ms after 68
- 3.3V, 5V and 12V are stable 68
- 2.7. LAN 70
- 2.7.2. Reference Schematics 73
- 2.8. USB Ports 76
- 2.8.2. Reference Schematics 77
- 2.9. USB 3.0 81
- 2.9.1.3. USB 3.0 connector 83
- 2.9.2. Reference Schematics 84
- 2.10. SATA 87
- Pins Signal Description 88
- SATA Port 89
- 2.11. LVDS 91
- Term Definition 94
- 2.11.2. Reference Schematics 97
- 2.12.1. Signal Definitions 99
- 2.12.2. Reference Schematics 100
- 2.13. VGA 101
- COM Express Interfaces 102
- 2.14. TV-Out 104
- COM Express Module 106
- AUDIO POWER 107
- AUDIO CODEC - ALC888 107
- ANALOG I/O CONNECTOR 107
- 2.15.1.2. AC'97 108
- Figure 41: Audio Amplifier 109
- 2.16.1. Signal Definition 111
- SUPER I/O 115
- COM1/COM2 116
- 2.17.1. Signal Definition 118
- 2.18.1. Signal Definitions 121
- 2.18.2. Reference Schematics 121
- 2.19.1. Signal Definitions 123
- 2.20.1. Signal Definitions 125
- C O M 1 C O M 2 126
- 2.21. CAN Interface 127
- 2.21.2. Reference Schematics 128
- 2.22. Miscellaneous Signals 129
- POWER ATX 133
- POWER AT 133
- Type 2 Detection 133
- 2.22.5. Watchdog Timer 137
- G P IO C o n n e c t o r 141
- 2.22.8. Fan Connector 142
- 2.22.9. Thermal Interface 143
- 2.23. PCI Bus 147
- 2.23.2. Reference Schematics 148
- 2.24.1. Signal Definitions 153
- 3. Power and Reset 156
- 3.2.1. ATX vs AT Supplies 157
- 3.2.2. Power States 157
- Power and Reset 158
- 3.2.5. Power Button 162
- 3.4. Reference Schematics 164
- Table 55: ATX Signal Names 166
- ATX Signal Name Description 166
- 3.5. Routing Considerations 167
- 3.5.3. VCC5_SBY Routing 168
- 4. BIOS Considerations 170
- Type Height Partnumber Note 171
- COM Express Module Connectors 172
- GND Plane 173
- Power Plane 173
- COM Express 175
- Table 60: Trace Parameters 176
- Symbol Definition 176
- Carrier Board 178
- Parameter Trace Routing 183
- Extended 194
- 7.2. Heatspreader 195
- (Ø2.7mm bore hole) 196
- (M2.5 thread) 196
- (Ø2.7 bore hole) 197
- Mechanical Considerations 198
- 8.3. Useful books 202
- 9.1. TV-Out 203
- 9.1.5. Signal Termination 206
- 9.1.6. Video Filter 206
- 9.1.7. ESD Protection 206
- 9.2. LPC Firmware Hub 207
- Appendix C: List of Tables 213
- Appendix D: List of Figures 215
- Table 79: Revision History 217
- Revision Date Author Changes 217
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