Kontron COMe Starterkit Eval T2 Manual de usuario Pagina 116
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COM Express Interfaces
Figure 45: LPC Serial Interfaces
Note: Connection between logic GND and chassis depends on grounding
architecture. Connect GND with chassis at a single point even though this
connection is drawn on all schematic examples throughout this document.
2.16.3. Routing Considerations
2.16.3.1. General Signals
LPC signals are similar to PCI signals and may be treated similarly. Route the LPC bus as 55 Ω,
single-ended signals. The bus may be referenced to ground (preferred), or to a well-bypassed
power plane or a combination of the two. Point-to-point (daisy-chain) routing is preferred,
although stubs up to 1.5 inches may be acceptable. Length-matching among LPC_AD[3:0],
LPC_FRAME# are needed
See Section 6.6.3 'LPC Trace Routing Guidelines' on page 193 below.
2.16.3.2. Bus Clock Routing
The LPC bus clock is similar to the PCI bus clock and should be treated similarly. The COM
Express Specification allows 1.6 ns +/- 0.1ns for the propagation delay of the LPC clock from the
Module pin to the LPC device destination pin. Using a typical propagation delay value of 180 ps /
inch, this works out to 8.88 inches of Carrier Board trace for a device-down application. For
device-up situations, 2.5 inches of clock trace are assumed to be on the LPC slot card (by
analogy to the PCI specification). This is deducted from the 8.88 inches, yielding 6.38 inches.
On a Carrier Board with a small form factor, serpentine clock traces may be required to meet the
clock-length requirement.
Route the LPC clock as a single-ended, 55 Ω trace with generous clearance to other traces and
to itself. A continuous ground-plane reference is recommended. Routing the clock on a single
ground referenced internal layer is preferred to reduce EMI.
PICMG
®
COM Express
®
Carrier Board Design Guide Rev. 2.0 / December 6, 2013
116/218
VCC_5V0
VCC_5V0
TX0
TX1
RTS0#
RTS1#
DTR0#
DTR1#
RX0
RX1
CTS0#
CTS1#
DSR0#
DSR1#
DCD1#
DCD0#
RI0#
RI1#
COM1/COM2
3243E:
Maxim MAX3243E
Exar SP3243E
TI TRS3243E
FB87
600R / 0.2A
FB87
600R / 0.2A
C248
3p3
C248
3p3
FB88
600R / 0.2A
FB88
600R / 0.2A
C256
3p3
C256
3p3
FB89
600R / 0.2A
FB89
600R / 0.2A
C210
100n / 16V
C210
100n / 16V
FB91
50-Ohms@100MHz 3A
FB91
50-Ohms@100MHz 3A
FB76
600R / 0.2A
FB76
600R / 0.2A
FB90
600R / 0.2A
FB90
600R / 0.2A
U51A
3243E
U51A
3243E
VCC
26
FORCEOFF
22
FORCEON
23
V+
27
V-
3
GND
25
C1+
28
C1-
24
INVALID
21
C2+
1
C2-
2
C243
3p3
C243
3p3
Shield
TopDB9Bottom DB9
J31
NORCOMP 189-009-613R351
Shield
TopDB9Bottom DB9
J31
NORCOMP 189-009-613R351
RX1
A2
RI1
A9
DTR1
A4
DSR1
A6
CD1
A1
TX1
A3
GND1
A5
CTS1
A8
RTS1
A7
RX2
B2
CTS2
B8
RTS2
B7
DTR2
B4
RI2
B9
TX2
B3
GND2
B5
DSR2
B6
CD2
B1
SH1
S1
SH2
S2
SH3
S3
SH4
S4
FB78
600R / 0.2A
FB78
600R / 0.2A
C246
3p3
C246
3p3
C249
3p3
C249
3p3
C207
470n / 16V
C207
470n / 16V
C209
100n / 16V
C209
100n / 16V
FB79
600R / 0.2A
FB79
600R / 0.2A
TTL/CMOS RS-232
U51B
3243E
TTL/CMOS RS-232
U51B
3243E
TIN1
14
TIN2
13
TIN3
12
ROUT1
19
ROUT2
18
ROUT2B
20
ROUT3
17
ROUT4
16
ROUT5
15
TOUT1
9
TOUT2
10
TOUT3
11
RIN1
4
RIN2
5
RIN3
6
RIN4
7
RIN5
8
C250
3p3
C250
3p3
FB80
600R / 0.2A
FB80
600R / 0.2A
C216
3p3
C216
3p3
C208
470n / 16V
C208
470n / 16V
C251
3p3
C251
3p3
FB81
600R / 0.2A
FB81
600R / 0.2A
C215
100n / 16V
C215
100n / 16V
C244
3p3
C244
3p3
C252
3p3
C252
3p3
TTL/CMOS RS-232
U52B
3243E
TTL/CMOS RS-232
U52B
3243E
TIN1
14
TIN2
13
TIN3
12
ROUT1
19
ROUT2
18
ROUT2B
20
ROUT3
17
ROUT4
16
ROUT5
15
TOUT1
9
TOUT2
10
TOUT3
11
RIN1
4
RIN2
5
RIN3
6
RIN4
7
RIN5
8
FB82
600R / 0.2A
FB82
600R / 0.2A
C214
100n / 16V
C214
100n / 16V
C213
470n / 16V
C213
470n / 16V
FB83
600R / 0.2A
FB83
600R / 0.2A
C247
3p3
C247
3p3
C253
3p3
C253
3p3
C212
470n / 16V
C212
470n / 16V
C254
3p3
C254
3p3
FB84
600R / 0.2A
FB84
600R / 0.2A
U52A
3243E
U52A
3243E
VCC
26
FORCEOFF
22
FORCEON
23
V+
27
V-
3
GND
25
C1+
28
C1-
24
INVALID
21
C2+
1
C2-
2
FB75
600R / 0.2A
FB75
600R / 0.2A
C206
470n / 16V
C206
470n / 16V
FB85
600R / 0.2A
FB85
600R / 0.2A
C255
3p3
C255
3p3
C242
3p3
C242
3p3
FB77
600R / 0.2A
FB77
600R / 0.2A
FB86
600R / 0.2A
FB86
600R / 0.2A
C211
470n / 16V
C211
470n / 16V
C245
3p3
C245
3p3
- COM Express® 1
- Carrier Design Guide 1
- Contents 3
- 1. Preface 8
- 1.6. Name and logo usage 9
- 1.7. Intellectual property 10
- Term Description 11
- 1.10. Schematic Conventions 15
- 2. COM Express Interfaces 16
- COM Expre ss Module 17
- Type 10 17
- Table 4: Pin-out Comparison 20
- , the PCI 30
- 2.3.5. Schematic Examples 34
- Signal Pin Description I/O 45
- Figure 15: ExpressCard Size 45
- 2.4.1. Signal Definitions 48
- 2.4.2. PEG Configuration 49
- 2.4.3. Reference Schematics 52
- DisplayPort is supported 55
- DisplayPort Example 56
- Figure 21: HDMI Example 57
- Figure 22: DVI Example 59
- SDVO Port Configuration 61
- Supported SDVO Devices 62
- DVI_SDAROM 63
- DVI_SCLROM 63
- SDVO I2C Bus Address 63
- Write = 0111 0000 (70h) 63
- Read = 0111 0001 (71h) 63
- 2.6.1. Signal Definitions 66
- Earliest asserted 1ms after 68
- 3.3V, 5V and 12V are stable 68
- 2.7. LAN 70
- 2.7.2. Reference Schematics 73
- 2.8. USB Ports 76
- 2.8.2. Reference Schematics 77
- 2.9. USB 3.0 81
- 2.9.1.3. USB 3.0 connector 83
- 2.9.2. Reference Schematics 84
- 2.10. SATA 87
- Pins Signal Description 88
- SATA Port 89
- 2.11. LVDS 91
- Term Definition 94
- 2.11.2. Reference Schematics 97
- 2.12.1. Signal Definitions 99
- 2.12.2. Reference Schematics 100
- 2.13. VGA 101
- COM Express Interfaces 102
- 2.14. TV-Out 104
- COM Express Module 106
- AUDIO POWER 107
- AUDIO CODEC - ALC888 107
- ANALOG I/O CONNECTOR 107
- 2.15.1.2. AC'97 108
- Figure 41: Audio Amplifier 109
- 2.16.1. Signal Definition 111
- SUPER I/O 115
- COM1/COM2 116
- 2.17.1. Signal Definition 118
- 2.18.1. Signal Definitions 121
- 2.18.2. Reference Schematics 121
- 2.19.1. Signal Definitions 123
- 2.20.1. Signal Definitions 125
- C O M 1 C O M 2 126
- 2.21. CAN Interface 127
- 2.21.2. Reference Schematics 128
- 2.22. Miscellaneous Signals 129
- POWER ATX 133
- POWER AT 133
- Type 2 Detection 133
- 2.22.5. Watchdog Timer 137
- G P IO C o n n e c t o r 141
- 2.22.8. Fan Connector 142
- 2.22.9. Thermal Interface 143
- 2.23. PCI Bus 147
- 2.23.2. Reference Schematics 148
- 2.24.1. Signal Definitions 153
- 3. Power and Reset 156
- 3.2.1. ATX vs AT Supplies 157
- 3.2.2. Power States 157
- Power and Reset 158
- 3.2.5. Power Button 162
- 3.4. Reference Schematics 164
- Table 55: ATX Signal Names 166
- ATX Signal Name Description 166
- 3.5. Routing Considerations 167
- 3.5.3. VCC5_SBY Routing 168
- 4. BIOS Considerations 170
- Type Height Partnumber Note 171
- COM Express Module Connectors 172
- GND Plane 173
- Power Plane 173
- COM Express 175
- Table 60: Trace Parameters 176
- Symbol Definition 176
- Carrier Board 178
- Parameter Trace Routing 183
- Extended 194
- 7.2. Heatspreader 195
- (Ø2.7mm bore hole) 196
- (M2.5 thread) 196
- (Ø2.7 bore hole) 197
- Mechanical Considerations 198
- 8.3. Useful books 202
- 9.1. TV-Out 203
- 9.1.5. Signal Termination 206
- 9.1.6. Video Filter 206
- 9.1.7. ESD Protection 206
- 9.2. LPC Firmware Hub 207
- Appendix C: List of Tables 213
- Appendix D: List of Figures 215
- Table 79: Revision History 217
- Revision Date Author Changes 217
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