Kontron COMe Starterkit Eval T2 Manual de usuario Pagina 153
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COM Express Interfaces
2.24. IDE and CompactFlash (PATA)
2.24.1. Signal Definitions
Type 2 and 4 COM Express Modules provide a single channel IDE interface supporting two
standard IDE hard drives or ATAPI devices with a maximum transfer rate of ATA100 (Ultra-DMA-
100 with 100MB/s transfer rate). The corresponding signals can be found on the Module
connector rows C and D.
Table 50: Parallel ATA Signal Descriptions
Signal Pin Description I/O IDE40 IDE44 CF
IDE_D0 D7 Bidirectional data to / from IDE device. I/O 3.3V 17 17 21
IDE_D1 C10 Bidirectional data to / from IDE device. I/O 3.3V 15 15 22
IDE_D2 C8 Bidirectional data to / from IDE device. I/O 3.3V 13 13 23
IDE_D3 C4 Bidirectional data to / from IDE device. I/O 3.3V 11 11 2
IDE_D4 D6 Bidirectional data to / from IDE device. I/O 3.3V 9 9 3
IDE_D5 D2 Bidirectional data to / from IDE device. I/O 3.3V 7 7 4
IDE_D6 C3 Bidirectional data to / from IDE device. I/O 3.3V 5 5 5
IDE_D7 C2 Bidirectional data to / from IDE device. I/O 3.3V 3 3 6
IDE_D8 C6 Bidirectional data to / from IDE device. I/O 3.3V 4 4 47
IDE_D9 C7 Bidirectional data to / from IDE device. I/O 3.3V 6 6 48
IDE_D10 D3 Bidirectional data to / from IDE device. I/O 3.3V 8 8 49
IDE_D11 D4 Bidirectional data to / from IDE device. I/O 3.3V 10 10 27
IDE_D12 D5 Bidirectional data to / from IDE device. I/O 3.3V 12 12 28
IDE_D13 C9 Bidirectional data to / from IDE device. I/O 3.3V 14 14 29
IDE_D14 C12 Bidirectional data to / from IDE device. I/O 3.3V 16 16 30
IDE_D15 C5 Bidirectional data to / from IDE device. I/O 3.3V 18 18 31
IDE_A[0:2] D13-D15 Address lines to IDE device. O 3.3V 35, 33, 36 35, 33, 36 20, 19, 18
IDE_IOW# D9 I/O write line to IDE device. O 3.3V 23 23 35
IDE_IOR# C14 I/O read line to IDE device. O 3.3V 25 25 34
IDE_REQ D8 IDE device DMA request. It is asserted by
the IDE device to request a data transfer.
I 3.3V 21 21 37
IDE_ACK# D10 IDE device DMA acknowledge. O 3.3V 29 29 44
IDE_CS1# D16 IDE device chip select for 1F0h to 1FFh
range.
O 3.3V 37 37 7
IDE_CS3# D17 IDE device chip select for 3F0h to 3FFh
range.
O 3.3V 38 38 32
IDE_IORDY C13 IDE device I/O ready input. Pulled low by
the IDE device to extend the cycle.
I 3.3V 27 27 42
IDE_RESET# D18 Reset output to IDE device, active low. O 3.3V 1 1 41
IDE_IRQ D12 Interrupt request from IDE device. I 3.3V 31 31 43
IDE_CBLID# D77 Input from off-Module hardware indicating
the type of IDE cable being used. High
indicates a 40-pin cable used for legacy
IDE modes. Low indicates that an 80-pin
cable with interleaved grounds is used.
Such a cable is required for Ultra-DMA 66,
100 modes.
I 3.3V 34 34 46
DASP 39 39 45
GND 2, 19, 22, 24,
26, 30, 40
2, 19, 22, 24,
26, 30, 40,
43
17, 16, 15,
14, 12, 11,
10, 8, 12, 6,
9, 33, 25, 26
39 (master)
PICMG
®
COM Express
®
Carrier Board Design Guide Rev. 2.0 / December 6, 2013
153/218
- COM Express® 1
- Carrier Design Guide 1
- Contents 3
- 1. Preface 8
- 1.6. Name and logo usage 9
- 1.7. Intellectual property 10
- Term Description 11
- 1.10. Schematic Conventions 15
- 2. COM Express Interfaces 16
- COM Expre ss Module 17
- Type 10 17
- Table 4: Pin-out Comparison 20
- , the PCI 30
- 2.3.5. Schematic Examples 34
- Signal Pin Description I/O 45
- Figure 15: ExpressCard Size 45
- 2.4.1. Signal Definitions 48
- 2.4.2. PEG Configuration 49
- 2.4.3. Reference Schematics 52
- DisplayPort is supported 55
- DisplayPort Example 56
- Figure 21: HDMI Example 57
- Figure 22: DVI Example 59
- SDVO Port Configuration 61
- Supported SDVO Devices 62
- DVI_SDAROM 63
- DVI_SCLROM 63
- SDVO I2C Bus Address 63
- Write = 0111 0000 (70h) 63
- Read = 0111 0001 (71h) 63
- 2.6.1. Signal Definitions 66
- Earliest asserted 1ms after 68
- 3.3V, 5V and 12V are stable 68
- 2.7. LAN 70
- 2.7.2. Reference Schematics 73
- 2.8. USB Ports 76
- 2.8.2. Reference Schematics 77
- 2.9. USB 3.0 81
- 2.9.1.3. USB 3.0 connector 83
- 2.9.2. Reference Schematics 84
- 2.10. SATA 87
- Pins Signal Description 88
- SATA Port 89
- 2.11. LVDS 91
- Term Definition 94
- 2.11.2. Reference Schematics 97
- 2.12.1. Signal Definitions 99
- 2.12.2. Reference Schematics 100
- 2.13. VGA 101
- COM Express Interfaces 102
- 2.14. TV-Out 104
- COM Express Module 106
- AUDIO POWER 107
- AUDIO CODEC - ALC888 107
- ANALOG I/O CONNECTOR 107
- 2.15.1.2. AC'97 108
- Figure 41: Audio Amplifier 109
- 2.16.1. Signal Definition 111
- SUPER I/O 115
- COM1/COM2 116
- 2.17.1. Signal Definition 118
- 2.18.1. Signal Definitions 121
- 2.18.2. Reference Schematics 121
- 2.19.1. Signal Definitions 123
- 2.20.1. Signal Definitions 125
- C O M 1 C O M 2 126
- 2.21. CAN Interface 127
- 2.21.2. Reference Schematics 128
- 2.22. Miscellaneous Signals 129
- POWER ATX 133
- POWER AT 133
- Type 2 Detection 133
- 2.22.5. Watchdog Timer 137
- G P IO C o n n e c t o r 141
- 2.22.8. Fan Connector 142
- 2.22.9. Thermal Interface 143
- 2.23. PCI Bus 147
- 2.23.2. Reference Schematics 148
- 2.24.1. Signal Definitions 153
- 3. Power and Reset 156
- 3.2.1. ATX vs AT Supplies 157
- 3.2.2. Power States 157
- Power and Reset 158
- 3.2.5. Power Button 162
- 3.4. Reference Schematics 164
- Table 55: ATX Signal Names 166
- ATX Signal Name Description 166
- 3.5. Routing Considerations 167
- 3.5.3. VCC5_SBY Routing 168
- 4. BIOS Considerations 170
- Type Height Partnumber Note 171
- COM Express Module Connectors 172
- GND Plane 173
- Power Plane 173
- COM Express 175
- Table 60: Trace Parameters 176
- Symbol Definition 176
- Carrier Board 178
- Parameter Trace Routing 183
- Extended 194
- 7.2. Heatspreader 195
- (Ø2.7mm bore hole) 196
- (M2.5 thread) 196
- (Ø2.7 bore hole) 197
- Mechanical Considerations 198
- 8.3. Useful books 202
- 9.1. TV-Out 203
- 9.1.5. Signal Termination 206
- 9.1.6. Video Filter 206
- 9.1.7. ESD Protection 206
- 9.2. LPC Firmware Hub 207
- Appendix C: List of Tables 213
- Appendix D: List of Figures 215
- Table 79: Revision History 217
- Revision Date Author Changes 217
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