COM Express Interfaces
2.12.2. Reference Schematics
Figure 35: eDP Reference Schematic
The reference schematic provides a generic eDP interface. The eDP connector used in the
design is an example only. Other connectors can be used based on the design requirements.
JP83 selects 3.3 or 5V for the panel power. R1125 ensures that panel power is disabled when
the Module is powering up and before the signal is actively driven. The panel control signals
eDP_BKLT_EN, eDP_BKLT_CTRL as well as eDP_HPD are 3.3V level signals, check your
panel specifications for correct voltage levels and provide translation if necessary. The reference
design supports individual backlight control signals. It should be noted that some panels handle
these functions over the AUX channel.
2.12.3. Routing Considerations
The traces from JP83 and associated FETs to the eDP connector carry power to the panel. The
traces should be routed with appropriate thickness to handle the current expected.
eDP_TX and eDP_AUX differential pairs should be routed as high speed differential pairs.
The panel control signals are low speed and do not require any additional care.
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COM Express
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