Kontron COMe Starterkit Eval T2 Manual de usuario Pagina 133
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COM Express Interfaces
2.22.2. Speaker Output
The PC-AT architecture provides a speaker signal that creates beeps and chirps. The signal is a
digital-logic signal that is created from system timers within the core chipset. The speaker
provides feedback to the user that an error has occurred. The system BIOS usually drives the
speaker line with a set of beep codes to indicate hardware problems such as a memory test
failure, a missing video device, or a missing keyboard. Application software often uses the PC-
AT speaker to flag an error such as an invalid key press.
This speaker signal should not be confused with the analog-audio signals produced by the audio
CODEC. In many systems, the PC-AT speaker signal is fed into one of the audio CODEC inputs,
allowing it to be mixed with other audio signals and heard on the audio transducer (speakers and
headphones) that the CODEC drives.
The COM Express Module provides a speaker output signal called 'SPKR', which is intended to
drive an external FET or a logic gate to connect a PC speaker.
The 'SPKR' signal is often used as a configuration strap for the Modules chipset. It should not be
connected to a pull-up or pull-down resistor, which could overwrite the internal chipset
configuration and result in a malfunction of the Module.
The PC-AT audio transducer that is used for error messages is usually a small, low-cost
loudspeaker or piezoelectric-electric buzzer. A buffering between the Module SPKR pin and the
audio transducer is required. An example circuit is shown in Figure 52 below. The net SPKR is
sourced from Module pin B32. If the transducer is a low impedance device, such as an 8 Ω
speaker, then a larger resistor value and package size for R173/R175 is in order.
Figure 52: Speaker Output Circuitry
PICMG
®
COM Express
®
Carrier Board Design Guide Rev. 2.0 / December 6, 2013
133/218
VCC_3V3 VCC_3V3VCC_5V0 VCC_5V0
VCC_12V_CEX
VCC_12V
VCC_12V_CEX
VCC_5V_SBY
VCC_12V_CEX
VCC_5V_SBY
NO CONNECT
NO CONNECT
NO CONNECT
NO CONNECT
VCC_5V_SBY
CEX
PWR_OK
CEX
PWRBTN#
CEX
SLP_S3#
CEX
PWRBTN#
CEX
PWR_OK
CEX
SUS_S3#
CEX
TYPE2#
CEX
TYPE1#
CEX
TYPE0#
POWER ATX
ATX ON
note: PWR_OK is only
3.3V tolerant
POWER AT
note: only VCC_12V_CEX and VCC_5V_SBY are
needed by COM Express module
Type 2 Detection
J41
ATX_12V_Connector
J41
ATX_12V_Connector
GND
1
GND
2
+12V
3
+12V
4
X9
ATX Power Connector
X9
ATX Power Connector
+3.3V
1
+3.3V
2
GND
3
+5V
4
GND
5
+5V
6
GND
7
PG
8
5V_SB
9
+12V
10
+3.3V
11
-12V
12
GND
13
PS_ON#
14
GND
15
GND
16
GND
17
-5V
18
+5V
19
+5V
20
Power ConnectorPower Connector
Q14
BS138
Q14
BS138
3
1
2
C202
100n
C202
100n
U1412A
74HCT21
U1412A
74HCT21
1A
1
1B
2
1C
4
1D
5
1Y
6
VG
sh
SW1
PB_ON
sh
SW1
PB_ON
5
R1456
4k7
R1456
4k7
R1457
4k7
R1457
4k7
C203
100n
C203
100n
R1458
4k7
R1458
4k7
R1455
100k
R1455
100k
74VHC0774VHC07
12
C232
100n
C232
100n
C201
100n
C201
100n
VCC_5V0 VCC_5V0
CEX
SPKR
CEX
SPKR
+
SPK2
Piezo Speaker
+
SPK2
Piezo Speaker
R169
22k
R169
22k
+
SPK1
Piezo Speaker
+
SPK1
Piezo Speaker
R174
100R
R174
100R
R173
75R
R173
75R
R175
33R
R175
33R
Q6
BC817
Q6
BC817
1
32
D29
BAT54A
D29
BAT54A
Q8
2N7002
Q8
2N7002
3
1
2
- COM Express® 1
- Carrier Design Guide 1
- Contents 3
- 1. Preface 8
- 1.6. Name and logo usage 9
- 1.7. Intellectual property 10
- Term Description 11
- 1.10. Schematic Conventions 15
- 2. COM Express Interfaces 16
- COM Expre ss Module 17
- Type 10 17
- Table 4: Pin-out Comparison 20
- , the PCI 30
- 2.3.5. Schematic Examples 34
- Signal Pin Description I/O 45
- Figure 15: ExpressCard Size 45
- 2.4.1. Signal Definitions 48
- 2.4.2. PEG Configuration 49
- 2.4.3. Reference Schematics 52
- DisplayPort is supported 55
- DisplayPort Example 56
- Figure 21: HDMI Example 57
- Figure 22: DVI Example 59
- SDVO Port Configuration 61
- Supported SDVO Devices 62
- DVI_SDAROM 63
- DVI_SCLROM 63
- SDVO I2C Bus Address 63
- Write = 0111 0000 (70h) 63
- Read = 0111 0001 (71h) 63
- 2.6.1. Signal Definitions 66
- Earliest asserted 1ms after 68
- 3.3V, 5V and 12V are stable 68
- 2.7. LAN 70
- 2.7.2. Reference Schematics 73
- 2.8. USB Ports 76
- 2.8.2. Reference Schematics 77
- 2.9. USB 3.0 81
- 2.9.1.3. USB 3.0 connector 83
- 2.9.2. Reference Schematics 84
- 2.10. SATA 87
- Pins Signal Description 88
- SATA Port 89
- 2.11. LVDS 91
- Term Definition 94
- 2.11.2. Reference Schematics 97
- 2.12.1. Signal Definitions 99
- 2.12.2. Reference Schematics 100
- 2.13. VGA 101
- COM Express Interfaces 102
- 2.14. TV-Out 104
- COM Express Module 106
- AUDIO POWER 107
- AUDIO CODEC - ALC888 107
- ANALOG I/O CONNECTOR 107
- 2.15.1.2. AC'97 108
- Figure 41: Audio Amplifier 109
- 2.16.1. Signal Definition 111
- SUPER I/O 115
- COM1/COM2 116
- 2.17.1. Signal Definition 118
- 2.18.1. Signal Definitions 121
- 2.18.2. Reference Schematics 121
- 2.19.1. Signal Definitions 123
- 2.20.1. Signal Definitions 125
- C O M 1 C O M 2 126
- 2.21. CAN Interface 127
- 2.21.2. Reference Schematics 128
- 2.22. Miscellaneous Signals 129
- POWER ATX 133
- POWER AT 133
- Type 2 Detection 133
- 2.22.5. Watchdog Timer 137
- G P IO C o n n e c t o r 141
- 2.22.8. Fan Connector 142
- 2.22.9. Thermal Interface 143
- 2.23. PCI Bus 147
- 2.23.2. Reference Schematics 148
- 2.24.1. Signal Definitions 153
- 3. Power and Reset 156
- 3.2.1. ATX vs AT Supplies 157
- 3.2.2. Power States 157
- Power and Reset 158
- 3.2.5. Power Button 162
- 3.4. Reference Schematics 164
- Table 55: ATX Signal Names 166
- ATX Signal Name Description 166
- 3.5. Routing Considerations 167
- 3.5.3. VCC5_SBY Routing 168
- 4. BIOS Considerations 170
- Type Height Partnumber Note 171
- COM Express Module Connectors 172
- GND Plane 173
- Power Plane 173
- COM Express 175
- Table 60: Trace Parameters 176
- Symbol Definition 176
- Carrier Board 178
- Parameter Trace Routing 183
- Extended 194
- 7.2. Heatspreader 195
- (Ø2.7mm bore hole) 196
- (M2.5 thread) 196
- (Ø2.7 bore hole) 197
- Mechanical Considerations 198
- 8.3. Useful books 202
- 9.1. TV-Out 203
- 9.1.5. Signal Termination 206
- 9.1.6. Video Filter 206
- 9.1.7. ESD Protection 206
- 9.2. LPC Firmware Hub 207
- Appendix C: List of Tables 213
- Appendix D: List of Figures 215
- Table 79: Revision History 217
- Revision Date Author Changes 217
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