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COMe-P2020 User Guide
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3.3 I/O Address Map
For the COMe-cP2020, the register address is composed of the base address of the Onboard Logic 4k indicated in the virtual
memory map (see Table XX) and the respective address offset indicated in the I/O address map (Table XX):
register address = 0xFF00_0000 base + address offset.
Table 3-3: I/O Address Map
ADDRESS FUNCTION
000h User Boot ROM Location Configuration Register
001h User Host/Agent Configuration Register
002h User I/O Port Selection Register
003h User Boot Configuration Register
004h User Boot ROM Location Configuration Register
005h User SerDes Reference Clock Configuration Register
006h User eTSEC2 SGMII Mode Configuration Register
007h User eTSEC3 SGMII Mode Configuration Register
008h User eTSEC1 Width Configuration Register
009h User eTSEC2 Protocol Configuration Register
00Ah User eTSEC3 Protocol Configuration Register
00Bh User RapidIO Device ID Register
00Ch User RapidIO System Size Register
00Dh User Core0 Speed Register
00Eh User Core1 Speed Register
00Fh User SerDes PLL Time-out Enable Register
010h Serdes Multiplexer Control Register
011h User Checksum Register
012h UFM Erase Control Register
013h UFM/CPU Control and Status Register
014h-07Fh Reserved
080h POST Code Low Byte Register
081h POST Code High Byte Register
082h-083h Reserved
084h Debug Low Byte Register
085h Debug High Byte Register
086h-27Fh Reserved
280h Status Register 0
281h Status Register 1 (Reserved)
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