Kontron COMe-cHL6 Manual de usuario Pagina 44
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COMe-cHL6 / Features and Interfaces
4.14 Display Configuration
Maximum supported Resolutions in Single Display Configuration
Port Max Resolution
DP 3200×2000@60Hz, 24bpp
HDMI 4096×2160@24Hz, 24bpp
2560×1600@60Hz, 24bpp
1920×1080@60Hz, 36bpp
DVI 1920×1200@60Hz, 24bpp
WiDi 1920×1080@30Hz, 24bpp
1280×720@60Hz, 24bpp
eDP (x4) 3200×2000@60Hz, 24bpp
LVDS 1920×1200@60Hz
Maximum supported Pixel Clock
Port Max Pixel Clock
DP 414.5 MHz
HDMI 300 MHz
DVI 165 MHz
DDI supported resolutions
Display1 Display2 Display3 Max.Res Display 1 Max.Res Display 2 Max.Res Display 3
HDMI/DP HDMI/DP eDP/LVDS 4096×2160@24Hz
3200×2000@60Hz
4096×2160@24Hz
3200×2000@60Hz
3200×2000@60Hz @ eDP
1920×1200 @ LVDS
DVI DVI/WiDi eDP/LVDS 1920×1200@60Hz 1920×1200@60Hz
1920×1080@30Hz
3200×2000@60Hz @ eDP
1920×1200 @ LVDS
DP/HDMI DVI/WiDi eDP/LVDS 3200×2000@24Hz
4096×2160@24Hz
1920×1200@60Hz
1920×1080@30Hz
3200×2000@60Hz @ eDP
1920×1200 @ LVDS
Link Data Rate
The maximum supported Display Ports resolutions are dependent on the Link Data Rate and the used Lane Count:
Link Data Rate 1 Lane 2 Lanes 4 Lanes
RBR 1024×600 1400×1050 2240×1400
HBR 1280×960 1920×1200 2880×1800
HBR2 1920×1200 2880×1800 3840×2160
(valid for 60Hz refresh rate and 24bpp)
3 independent Display Support
The COMe-cHL6 supports up to 3 independent displays in Windows 7/8 and Linux
44
- COMe-cHL6 1
- » Table of Contents « 3
- 1 User Information 5
- 1.5 Warranty 6
- 1.6 Technical Support 6
- 2 Introduction 7
- 2.2 Naming clarification 8
- 2.5 COM Express® Benefits 9
- 3 Product Specification 10
- 3.2 Functional Specification 11
- Graphics Core 15
- Connectivity 16
- Misc Interfaces and Features 17
- Kontron Features 17
- Additional features 17
- Power Features 17
- 3.3 Block Diagram 18
- 3.4 Accessories 19
- 3.5 Electrical Specification 20
- 3.5.5 ATX Mode 21
- 3.5.6 Single Supply Mode 21
- 3.6 Power Control 22
- 3.7.2 Humidity 23
- WEEE Directive 24
- Conformal Coating 24
- Shock & Vibration 25
- 3.9 MTBF 26
- 3.10 Mechanical Specification 27
- 3.11 Module Dimensions 28
- 4 Features and Interfaces 30
- 4.4 SPI boot 32
- Using an external SPI flash 33
- 4.5 M.A.R.S 34
- 4.6 UART 35
- 4.7 Fast I2C 36
- Time-out events 37
- WDT Signal 37
- 4.10 Speedstep Technology 40
- 4.11 C-States 41
- 4.12 Hyper Threading 42
- 4.14 Display Configuration 44
- DDI Design Consideration 46
- DVI-I Design Topology 46
- Requirements 47
- Setup a Multi-monitor system 47
- 4.16 Intel® vPro™ technology 48
- 5 System Resources 50
- 5.2 Memory Area 51
- 5.3 I/O Address Map 51
- 5.5 Internal I2C Bus 52
- 5.6 External I2C Bus 52
- 6 Connectors 54
- 7 Pinout List 55
- 7.2 Connector X1A Row A 56
- COMe-cHL6 / Pinout List 57
- 7.3 Connector X1A Row B 58
- 7.4 Connector X1B Row C 60
- 7.5 Connector X1B Row D 62
- 8 BIOS Operation 64
- 8.4 Setup Guide 65
- 8.5 BIOS Setup 66
- System Information 67
- Boot Features 68
- Network Stack 70
- Platform Information 71
- 8.5.2 Advanced 72
- Silicon Information 73
- Processor Configuration 74
- Processor Power Management 75
- Miscellaneous 77
- I2C Speed 78
- Watchdog 79
- Generic LPC Decode Ranges 80
- H/W Monitor 81
- HDD Configuration 83
- Memory Configuration 86
- Graphics Configuration 89
- IGD Configuration 90
- South Bridge Configuration 92
- SB PCI Express Config 93
- PCI Express Root Port 1/2/3/4 94
- SB USB Config 95
- SB Azalia Config 96
- Network Configuration 97
- CPLD Configuration 98
- LPC SIO Configuration 99
- ME Configuration 100
- Thermal Configuration 101
- CPU Thermal Configuration 102
- COMe-cHL6 / BIOS Operation 103
- Passive Cooling 104
- ICC Configuration 105
- Intel® Rapid Start Technology 107
- 8.5.3 Security 109
- Security 110
- 8.5.4 Boot 111
- 8.5.5 Exit 112
- Corporate Offices 113
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