Kontron COMe-cHL6 Manual de usuario Pagina 14
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COMe-cHL6 / Product Specification
Memory
Sockets
1x DDR3L SODIMM, 1x memory down
Memory Type
DDR3L-1600
Maximum Size
1-8GB SODIMM, 2-4GB memory down
Technology
Dual Channel
Chipset
The integrated Intel® Platform Controller Hub LynxPoint-LP supports:
» PCI Express Revision 2.0
» PCI Express Configurations x1, x2, x4
» Intel® Virtualization Technology for Directed I/O (VT-d)
» Intel® Trusted Execution Technology (TXT)
» Intel® vPro Technology (optional)
» Intel® Active Management Technology 9.0 (optional)
» Intel® Anti-Theft Technology
» Intel® Rapid Storage Technology
» Intel® Smart Response Technology
HighSpeed I/O Port Configuration
Internal Port Usage COMe
Port1
USB3 #1 USB #0 = USB3.0
Port2
USB3 #2 USB #1 = USB3.0
Port3
PCIe #1 or USB3 #3 PCIe #0
Port4
PCIe #2 or USB3 #4 PCIe #1
Port5
PCIe #3 PCIe #2
Port6
PCIe #4 PCIe #3
Port7
PCIe #5L0 PCIe #4
Port8
PCIe #5L1 PCIe #5 (x2 only with #4)
Port9
PCIe #5L2 Ethernet (PCIe #6 w/o LAN)
Port10
PCIe #5L3 not used (PCIe #7 w/o LAN)
Port11
PCIe #6L0 or SATA6 #3 SATA #3 (6Gbps)
Port12
PCIe #6L1 or SATA6 #2 SATA #2 (6Gbps)
Port13
PCIe #6L2 or SATA6 #1 SATA #1 (6Gbps)
Port14
PCIe #6L3 or SATA6 #0 SATA #0 (6Gbps)
x2 Port PCIe #4 + #5 are only available with Softstrap option (modified Flash descriptor)
which disables onboard LAN (PCIe #5L2)
14
- COMe-cHL6 1
- » Table of Contents « 3
- 1 User Information 5
- 1.5 Warranty 6
- 1.6 Technical Support 6
- 2 Introduction 7
- 2.2 Naming clarification 8
- 2.5 COM Express® Benefits 9
- 3 Product Specification 10
- 3.2 Functional Specification 11
- Graphics Core 15
- Connectivity 16
- Misc Interfaces and Features 17
- Kontron Features 17
- Additional features 17
- Power Features 17
- 3.3 Block Diagram 18
- 3.4 Accessories 19
- 3.5 Electrical Specification 20
- 3.5.5 ATX Mode 21
- 3.5.6 Single Supply Mode 21
- 3.6 Power Control 22
- 3.7.2 Humidity 23
- WEEE Directive 24
- Conformal Coating 24
- Shock & Vibration 25
- 3.9 MTBF 26
- 3.10 Mechanical Specification 27
- 3.11 Module Dimensions 28
- 4 Features and Interfaces 30
- 4.4 SPI boot 32
- Using an external SPI flash 33
- 4.5 M.A.R.S 34
- 4.6 UART 35
- 4.7 Fast I2C 36
- Time-out events 37
- WDT Signal 37
- 4.10 Speedstep Technology 40
- 4.11 C-States 41
- 4.12 Hyper Threading 42
- 4.14 Display Configuration 44
- DDI Design Consideration 46
- DVI-I Design Topology 46
- Requirements 47
- Setup a Multi-monitor system 47
- 4.16 Intel® vPro™ technology 48
- 5 System Resources 50
- 5.2 Memory Area 51
- 5.3 I/O Address Map 51
- 5.5 Internal I2C Bus 52
- 5.6 External I2C Bus 52
- 6 Connectors 54
- 7 Pinout List 55
- 7.2 Connector X1A Row A 56
- COMe-cHL6 / Pinout List 57
- 7.3 Connector X1A Row B 58
- 7.4 Connector X1B Row C 60
- 7.5 Connector X1B Row D 62
- 8 BIOS Operation 64
- 8.4 Setup Guide 65
- 8.5 BIOS Setup 66
- System Information 67
- Boot Features 68
- Network Stack 70
- Platform Information 71
- 8.5.2 Advanced 72
- Silicon Information 73
- Processor Configuration 74
- Processor Power Management 75
- Miscellaneous 77
- I2C Speed 78
- Watchdog 79
- Generic LPC Decode Ranges 80
- H/W Monitor 81
- HDD Configuration 83
- Memory Configuration 86
- Graphics Configuration 89
- IGD Configuration 90
- South Bridge Configuration 92
- SB PCI Express Config 93
- PCI Express Root Port 1/2/3/4 94
- SB USB Config 95
- SB Azalia Config 96
- Network Configuration 97
- CPLD Configuration 98
- LPC SIO Configuration 99
- ME Configuration 100
- Thermal Configuration 101
- CPU Thermal Configuration 102
- COMe-cHL6 / BIOS Operation 103
- Passive Cooling 104
- ICC Configuration 105
- Intel® Rapid Start Technology 107
- 8.5.3 Security 109
- Security 110
- 8.5.4 Boot 111
- 8.5.5 Exit 112
- Corporate Offices 113
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