
3.2.18
SPI Interfaces
The SMARC sAT30 module supports three T30 SPI interfaces. One is used on the Module for an 8MB SPI device. Two
are
available off-Module for general purpose use.
SPI interface signals are exposed on the SMARC sAT30 edge connector as shown below:
SMARC sAT30 Edge finger
NVIDIA T30 CPU
Net Name
Notes
Pin #
Pin Name
Pin #
Pin Name
SPI0
P43
SPI0_CS0#
J24
SPI1_CS0#
T3_SPI1_CS0#
SPI0 Master Chip Select 0
output
P31
SPI0_CS1#
N4
ULPI_STP
T3_SPI1_CS1#
SPI0 Master Chip Select 1
output
P44
SPI0_CK
B28
SPI1_SCK
T3_SPI1_SCK
SPI0 Master Clock output
P45
SPI0_DIN
F28
SPI1_MISO
T3_SPI1_MISO
SPI0 Master Data input
(input to CPU, output from
SPIdevice)
P46
SPI0_DO
F29
SPI1_MOSI
T3_SPI1_MOSI
SPI0 Master Data output
(output from CPU, input to
SPIdevice)
SPI1
P54
SPI1_CS0#
G28
SPI2_CS0#
T3_SPI2_CS0
SPI1 Master Chip Select 0
output
P55
SPI1_CS1#
F25
SPI2_CS1#
T3_SPI2_CS1#
SPI1 Master Chip Select 1
output
P56
SPI1_CK
D29
SPI2_SCK
T3_SPI2_SCK
SPI1 Master Clock output
P57
SPI1_DIN
D30
SPI2_MISO
T3_SPI2_MISO
SPI1 Master Data input
(input to CPU, output from
SPI device)
P58
SPI1_DO
B27
SPI2_MOSI
T3_SPI2_MOSI
SPI1 Master Data output
(output from CPU, input to
(SPI device)
Comentarios a estos manuales