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User’s Guide
3.2.9 Carrier Based 24 bit Color Depth LVDS
The Module parallel LCD path may be used to implement single or dual channel Carrier Board LVDS transmitter(s).
The color packing may be 24 bit or 18 bit. Since 18 bit single channel color packing is already available from the
Module LVDS, only 24 bit color packing is described in this section.
A single channel implementation uses one SN75LVDS83B (or equivalent) LVDS transmitter and a dual channel
implementation uses one Thine THC63LVD827 (or equivalent) LVDS transmitter. The same dual channel LVDS
transmitter can be used for single channel LVDS implementation, if the feature is available on the transmitter.
The following table shows how the sA3874i LCD pins should be mapped to TI SN75LVDS83B, for standard single
channel LVDS 24 bit color packing. The chart shows pin numbers for the BGA version of the part. The TSSOP
version can be used as well, although the pin numbering is different. The pin names remain the same.
Transmitters from other vendors may be used as well.
ULP-COM sA3874i Edge finger
LVDS Transmitter
(TI SN75LVDS83B)
LVDS
Channel
Transmit
bit Order
24 bit standard color
mapping
Pin #
Pin Name
Pin #
Pin Name
S102
LCD_D8
K5
D7
0
1
G0
S116
LCD_D21
J4
D6
2
R5
S115
LCD_D20
K3
D4
3
R4
S114
LCD_D19
J3
D3
4
R3
S113
LCD_D18
K2
D2
5
R2
S112
LCD_D17
K1
D1
6
R1
S111
LCD_D16
J2
D0
7
R0
S94
LCD_D1
D5
D18
1
1
B1
S93
LCD_D0
E5
D15
2
B0
S107
LCD_D13
F6
D14
3
G5
S106
LCD_D12
G6
D13
4
G4
S105
LCD_D11
G5
D12
5
G3
S104
LCD_D10
J6
D9
6
G2
S103
LCD_D9
K6
D8
7
G1
S120
LCD_DE
A3
D26
2
1
DE
S121
LCD_VS
B4
D25
2
VS
- » User Guide « 1
- » Table of Contents « 2
- » Table of Figures « 5
- 1 User Information 6
- 1.6 Technical Support 7
- 2 Introduction 8
- 2.3.2 Kontron Documents 10
- 2.3.3 Kontron Schematics 10
- 2.3.6 Kontron Software BSP 10
- 3 Specifications 11
- User’s Guide 12
- 3.2.5 On-board Storage 13
- 3.2.6 Clocks 13
- 3.2.2 Form Factor 13
- 3.2.3 CPU 13
- 3.2.4 Module Memory 13
- EDGE FINGER 17
- Not Used 21
- 3.2.12 USB Interfaces 26
- 3.2.13 PCIe Interface 29
- 3.2.14 SATA Interface 30
- 3.2.16 SDIO Interface 34
- 3.2.18 SPI Interfaces 36
- 3.2.19 I2S Interfaces 37
- 3.2.20 SPDIF Interface 38
- 3.2.22 CAN Interface 40
- 3.2.23 I2C Interface 41
- 3.3 ULP-COM sA3874i Debug 43
- 3.4.1 Module Dimensions 44
- 3.4.2 Height on Top 44
- 3.4.3 Height on Bottom 44
- 3.4.4 Layout Diagrams 44
- 3.5.1 Supply Voltage 47
- 3.5.2 RTC/Backup Voltage 47
- 3.5.4 Module I/O Voltage 47
- 3.5.5 Power Consumption 48
- 3.6.1 Operating Temperature 49
- 3.6.2 Humidity 49
- 3.6.3 RoHS Compliance 49
- 4 Connectors 50
- 4.2 JTAG 64
- 5.1 Watchdog Timer 67
- 5.2 PMU GPIO 67
- 5.3 ULP-COM sA3874i I/O 68
- 5.4 Temperature Sensor 71
- 5.6 Board ID EEPROM 71
- 6.1 Thermal Management 72
- 6.3 Thermal Parameters 73
- 7 ULP-COM sA3874i Software 74
- 8.2 BOOT Selection 76
- 9.2 SPI Programming 77
- 9.3 eMMC Programming 77
- SN65LVDS93A BGA56 78
- SN65LVDS93AZQLR 78
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