Kontron COMe-mBT10 Manual de usuario Pagina 81
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COMe-mBT10 / BIOS Operation
SuperIO Configuration
This setup option is only available with LPC SuperI/O Nuvoton 83627 present on the carrier board. By default the COMe-
mBT10 supports the legacy interfaces of a 5V 83627HF(J) or 3.3V 83627DHG-P on external LPC. The SIO hardware monitor
is not supported in setup.
Feature Options Description
SIO Serial Port 0
Disabled
Enabled
Enable or Disable SIO Serial Port
- Base Address 3F8
2F8
3E8
2E8
Configure Serial Port Base Address
- IRQ 3
4
5
6
7
12
Configure Serial Port IRQ
SIO Serial Port 1
Disabled
Enabled
Enable or Disable SIO Serial Port
- Base Address 3F8
2F8
3E8
2E8
Configure Serial Port Base Address
- IRQ 3
4
5
6
7
12
Configure Serial Port IRQ
SIO Parallel Port
Disabled
Enabled
Enable or Disable SIO Parallel Port
- Device Mode
Standard Parallel Port
EPP
EPP & ECP
Configure Parallel Port Mode
- Base Address
378
278
3BC
Configure Parallel Port Base Address
81
- COMe-mBT10 1
- » Table of Contents « 3
- 1 User Information 5
- 1.5 Warranty 6
- 1.6 Technical Support 6
- 2 Introduction 7
- COMe-mBT10 / Introduction 8
- 2.5 COM Express® Benefits 9
- 3 Product Specification 10
- 3.2 Functional Specification 12
- Graphics Core 13
- Connectivity 13
- Feature OS Support Matrix 14
- Misc Interfaces and Features 14
- Kontron Features 14
- Power Features 15
- Additional features 15
- 3.3 Block Diagram 16
- 3.4 Accessories 17
- 3.5 Electrical Specification 18
- 3.5.5 ATX Mode 19
- 3.5.6 Single Supply Mode 19
- 3.6 Power Control 20
- 3.7.2 Humidity 21
- WEEE Directive 22
- Conformal Coating 22
- Shock & Vibration 23
- 3.9 MTBF 24
- 3.10 Mechanical Specification 25
- 3.11 Module Dimensions 26
- 3.12 Onboard Fan Connector 27
- 4 Features and Interfaces 29
- 4.2 Secure Digital Card 31
- 4.3 S5 Eco Mode 32
- 4.6 SPI boot 34
- Using an external SPI flash 35
- 4.7 M.A.R.S 36
- 4.8 UART 37
- 4.9 Fast I2C 38
- Time-out events 39
- WDT Signal 39
- 4.11 Speedstep Technology 40
- 4.12 C-States 41
- 4.13 Graphics Features 42
- 4.15 USB 44
- 5 System Resources 45
- 5.3 I/O Address Map 46
- 5.5 LPC addresses 47
- 5.6 I2C Bus 48
- 6 Pinout List 49
- 6.2 Connector X1A Row A 50
- COMe-mBT10 / Pinout List 51
- 6.3 Connector X1A Row B 52
- 7 BIOS Operation 54
- 7.3 POST Codes 55
- 7.4 Setup Guide 55
- 7.5 BIOS Setup 56
- System Information 57
- Boot Features 58
- COMe-mBT10 / BIOS Operation 59
- Platform Information 60
- 7.5.2 Advanced 61
- Miscellaneous 62
- Watchdog 63
- H/W Monitor 64
- CPU Configuration 66
- CPU Power Management 67
- Uncore Configuration 68
- IGD - LCD Control 69
- System Component 70
- LAN Configuration 71
- South Cluster Configuration 72
- PCI Express Configuration 73
- USB Configuration 74
- Audio Configuration 75
- SATA Drives 76
- LPSS & SCC Configuration 77
- Miscellaneous Configuration 78
- SMBIOS Event Log 79
- View SMBIOS event log 80
- SuperIO Configuration 81
- Onboard UART Configuration 82
- Memory ECC Error Logging 83
- 7.5.3 Security 84
- 7.5.4 Boot 85
- 7.5.5 Exit 86
- Corporate Offices 87
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