
KTD-N0882-H Page 53 Internal Connectors
KTQ87/KTH81 Users Guide
7.14 SPI Connector (SPI_HEAD)
The SPI Connector is normally not used. If however a SPI BIOS is connected via the SPI Connector then the
board will attempt to boot from it.
Note Pull U/D Ioh/Iol Type Signal PIN Signal Type Ioh/Iol Pull U/D Note
1 - CLK 1 2 SB3V3 PWR - -
- I CS0# 3 4 ADDIN IO /10K
10K/ - NC 5 6 NC - - -
- IO MISO 9 10 GND PWR - -
1K IO SPI_IO2_#WP 11 12 SPI_IO3_#HOLD IO 1K
7.15 LPC Connector (J30)
The LPC connector (Flex board only) is in general unsupported. Only under special circumstances may the
LPC interface be of interest.
Signal Description
CLK Serial Clock
SB3V3
3.3V Standby Voltage power line. Normally
output power, but when Motherboard is
turned off then the on-board SPI Flash can be 3.3V power sourced via this pin.
CS0# CS0# Chip Select 0, active low.
ADDIN ADDIN input signal must be NC.
MOSI Master Output, Slave Input.
ISOLATE#
The ISOLATE# input, active low, is normally NC, but must be connected to GND when
programming the
SPI flash. Power Supply to the Motherboard must be turned off when
loading SPI flash. The pull up resistor is connected via diode to 5VSB.
MISO Master Input, Slave Output
SPI_IO2_#WP
SPI Data I/O: A bidirectional signal used to support Dual IO Fast Read, Quad IO Fast Read
and Quad Output Fast Read modes. The signal is not used in Dual Output Fast Read mode.
SPI_IO3_#HOLD
SPI Data I/O: A bidirectional signal used to support Dual IO Fast Read, Quad IO Fast Read
and Quad Output Fast Read modes. The signal is not used in Dual Output Fast Read mode.
Note
Pull
U/D
Ioh/Iol Type Signal PIN Signal Type Ioh/Iol
Pull
U/D
Note
- - PWR LPC CLK 1 2 GND
- - PWR LPC FRAME# 3 KEY
LPC RST# 5 6 +5V
LPC AD3 7 8 LPC AD2
+3V3 9 10 LPC AD1
SMB_CLK 13 14 SMB_DATA
SB3V3 15 16 LPC SERIRQ
GND 17 18 CLKRUN#
SUS_STAT# 19 20 TPM_DRQ#0
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