Kontron COMe-cCT6 Manual de usuario Pagina 72
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COMe-cCT6 / BIOS Operation
CPU Configuration
Feature Options Description
Hyper-Threading Disabled
Enabled
Enables/Disables the Intel® Hyper Threading
Technology HTT
Core-Multi Processing Disabled
Enabled
Enables/Disables Core-Multi Processing mode
Execute Disable Bit Disabled
Enabled
XD can prevent certain classes of malicious buffer
overflow attacks when combined with a supporting OS
Limit CPUID Maximum
Disabled
Enabled
Disabled for Windows XP
Additional setup option for Cedarview-M (N2600/N2800)
Feature Options Description
Speedstep Disabled
Enabled
Enables/Disables Enhanced Intel® Speedstep
Technology EIST
72
- COMe-cCT6 1
- » Table of Contents « 3
- 1 User Information 6
- 1.5 Warranty 7
- 1.6 Technical Support 7
- 2 Introduction 8
- 2.5 COM Express® Benefits 9
- 3 Product Specification 10
- 3.2 Functional Specification 11
- Graphics Core 12
- Connectivity 13
- Misc Interfaces and Features 13
- Kontron Features 13
- Additional features 13
- Power Features 14
- 3.3 Block Diagram 15
- 3.4 Accessories 16
- 3.5 Electrical Specification 17
- 3.5.5 ATX Mode 18
- 3.5.6 Single Supply Mode 18
- 3.6 Power Control 19
- 3.7.2 Humidity 20
- WEEE Directive 21
- Conformal Coating 21
- Shock & Vibration 22
- PCB Specification 22
- 3.9 MTBF 23
- 3.10 Mechanical Specification 24
- 3.11 Module Dimensions 25
- 3.13 Onboard Connectors 27
- 3.13.1 FAN 28
- 3.13.2 CPU Debug & CPLD 28
- 4 Features and Interfaces 29
- 4.2 S5 Eco Mode 30
- 4.5 SPI boot 32
- Using an external SPI flash 33
- 4.6 M.A.R.S 34
- 4.7 UART 35
- 4.8 Fast I2C 36
- Configuration 37
- Time-out events 38
- WDT Signal 38
- 4.12 Speedstep Technology 41
- 4.13 C-States 42
- 4.14 Hyper Threading 43
- 4.15 Display Configuration 44
- DDI Design Consideration 46
- 4.16 Graphics Features 47
- 4.17 Hardware Configuration 47
- 4.20 USB 49
- 5 System Resources 50
- 5.3 I/O Address Map 51
- 5.5 I2C Bus 52
- 5.6 JILI I2C Bus 52
- 6 Connectors 53
- 7 Pinout List 54
- 7.2 Connector X1A Row A 55
- COMe-cCT6 / Pinout List 56
- 7.3 Connector X1A Row B 57
- 7.4 Connector X1B Row C 59
- 7.5 Connector X1B Row D 61
- 8 BIOS Operation 63
- 8.3 Setup Guide 65
- 8.4 POST Codes 65
- Displaying Submenus 66
- Item Specific Help Window 66
- General Help Window 66
- 8.5 BIOS Setup 67
- Platform Information 68
- 8.5.2 Advanced 69
- ACPI Settings 70
- Trusted Computing 71
- CPU Configuration 72
- Miscellaneous 73
- Watchdog 74
- Clock Control 75
- LAN Configuration 76
- Generic LPC Decode Ranges 77
- Smart Battery Configuration 78
- Battery Information 79
- GPIO Configuration 80
- Onboard I2C Speed 81
- Thermal Configuration 82
- CPU Thermal Configuration 83
- IDE Configuration 85
- Intel Fast Flash Standby 86
- USB Configuration 87
- SMART Settings 88
- Serial Port 0 Configuration 90
- Serial Port 1 Configuration 91
- Parallel Port Configuration 92
- Module COM port Configuration 93
- Serial Port 3 Configuration 94
- Serial Port 4 Configuration 95
- H/W Monitor 96
- COM Port allocation 97
- Console Redirection Settings 98
- 8.5.3 Chipset 99
- Host Bridge 100
- Memory Frequency and Timing 101
- Intel IGD Configuration 102
- South Bridge 103
- COMe-cCT6 / BIOS Operation 104
- PCI Express Root Port 0/1/2/3 105
- 8.5.4 Boot 106
- 8.5.5 Security 107
- Set HDD Password 108
- 8.5.6 Save & Exit 109
- Corporate Offices 110
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