
986LCD-M Family
4.4.3 LVDS Flat Panel Connector (LVDS)
Note 1: Support of 24bit OpenLDI/ SPWG panels is not officially supported by Intel®, but is supported by the
986LCD series boards by Kontron. Kontron intends to continue to provide 24bit OpenLDI/ SPWG panel
support even if Intel® withdraws this from the chipset, by an external converter module.
Signal Description – LVDS Flat Panel Connector:
LVDS A0..A3 LVDS A Channel data
LVDS ACLK LVDS A Channel clock
LVDS B0..B3 LVDS B Channel data
LVDS BCLK LVDS B Channel clock
BKLTCTL Backlight control (1), PWM signal to implement voltage in the range 0-3.3V
BKLTEN# Backlight Enable signal (active low) (2)
VDD ENABLE Output Display Enable.
LCDVCC VCC supply to the flat panel. This supply includes power-on/off sequencing.
The flat panel supply may be either 5V DC or 3.3V DC depending on the CMOS
configuration. Maximum load is 1A at both voltages.
DDC DATA DDC Channel Data
Note 1) Windows API (version Hwmon_KTAPI ver 4.5 or newer) is available to operate the BKLTCTL signal.
Some Inverters has a limited voltage range 0- 2.5V for this signal: If voltage is > 2.5V the Inverter
might latch up. Some Inverters generates noise to the BKLTCTL signal resulting in making the lvds
transmision fail (corrupted picture on the display). By adding 1K Ohm resistor in series with this signal
and mounted in the Inverter end of the cable kit the noise is limited and picture is stabil.
Note 2) If the Backlight Enable is required to be active high then make the BIOS Chipset setting: Backlight
Signal Inversion = Enabled.
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